ORGANIZATION OF MEMORY CHIPS IN MEMORY SYSTEMS THAT HAVE WORD SIZE WIDER THAN 8-BIT
Data bank
address bank
p-tuple (
...
) 1 2 p n n n
combinations with repetition
This paper presents a method to organize memory chips when they are used to build memory systems that have word size wider than 8-bit. Most memory chips have 8-bit word size. When the memory system has to be built from several memory chips of various sizes, this method gives all possible organizations of these chips in the memory system. This paper also suggests a precise definition of the term “memory bank” that is usually used in memory systems. Finally, an illustrative design problem was taken to illustrate the presented method practically
