This study aimed at evaluating the torsional capacity of reinforced concrete (RC) beams externally wrapped with fiber reinforced polymer (FRP) materials. An analytical model was described and used as a new computational procedure based on the softened truss model (STM) to predict the torsional behavior of RC beams strengthened with FRP. The proposed analytical model was validated with the existing experimental data for rectangular sections strengthened with FRP materials and considering torque-twist relationship and crack pattern at failure. The confined concrete behavior, in the case of FRP wrapping, was considered in the constitutive laws of concrete in the model. Then, an efficient algorithm was developed in MATLAB environment t

Reliability analysis methods are used to evaluate the safety of reinforced concrete structures by evaluating the limit state function 𝑔(𝑋𝑖). For implicit limit state function and nonlinear analysis , an advanced reliability analysis methods are needed. Monte Carlo simulation (MCS) can be used in this case however, as the number of input variables increases, the time required for MCS also increases, making it a time consuming method especially for complex problems with implicit performance functions. In such cases, MCS-based FORM (First Order Reliability Method) and Artificial Neural Network-based FORM (ANN FORM) have been proposed as alternatives. However, it is important to note that both MCS-FORM and ANN-FORM can also be time-con

In this research, the degradation of Dazomet has been studied by using thermal Fenton process and photo-Fenton processes under UV and lights sun. The optimum values of amounts of the Fenton reagents have been determined (0.07g FeSO4 .7H2O, 3.5µl H2O2) at 25 °C and at pH 7 where the degradation percentages of Dazomet were recorded high. It has been found that solar photo Fenton process was more effective in degradation of Dazomet than photo-Fenton under UV-light and thermal Fenton processes, the percentage of degradation of Dazomet by photo-Fenton under sun light are 88% and 100% at 249 nm and 281 nm respectively, while the percentages of degradation for photo-Fenton under UV-light are 87%, 96% and for thermal Fenton are 70% and 66.8% at 2

This paper aims to study the effect of circular Y-shaped fin arrangement to improve the low thermal response rates of a double-tube heat exchanger containing Paraffin phase change material (PCM). ANSYS software is employed to perform the computational fluid dynamic (CFD) simulations of the heat exchanger, including fluid flow, heat transfer, and the phase change process. The optimum state of the fin configuration is derived through sensitivity analysis by evaluating the geometrical parameters of the Y-shaped fin. For the same height of the fins (10 mm), the solidification time is reduced by almost 22%, and the discharging rate is enhanced by almost 26% using Y-shaped fins compared with the straight fins. The results demonstrate that the sol

This paper aims to study the effect of circular Y-shaped fin arrangement to improve the low thermal response rates of a double-tube heat exchanger containing Paraffin phase change material (PCM). ANSYS software is employed to perform the computational fluid dynamic (CFD) simulations of the heat exchanger, including fluid flow, heat transfer, and the phase change process. The optimum state of the fin configuration is derived through sensitivity analysis by evaluating the geometrical parameters of the Y-shaped fin. For the same height of the fins (10 mm), the solidification time is reduced by almost 22%, and the discharging rate is enhanced by almost 26% using Y-shaped fins compared with the straight fins. The results demonstrate that the sol

It is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL). This HDL program is then used to configure an FPGA to implement the designed circuit.