The temperature control process of electric heating furnace (EHF) systems is a quite difficult and changeable task owing to non-linearity, time delay, time-varying parameters, and the harsh environment of the furnace. In this paper, a robust temperature control scheme for an EHF system is developed using an adaptive active disturbance rejection control (AADRC) technique with a continuous sliding-mode based component. First, a comprehensive dynamic model is established by using convection laws, in which the EHF systems can be characterized as an uncertain second order system. Second, an adaptive extended state observer (AESO) is utilized to estimate the states of the EHF system and total disturbances, in which the observer gains are updated

In this paper, a random transistor-transistor logic signal generator and a synchronization circuit are designed and implemented in lab-scale measurement device independent–quantum key distribution systems. The random operation of the weak coherent sources and the system’s synchronization signals were tested by a time to digital convertor.

Theoretical and experimental investigations of the transient heat transfer parameters of constant heat flux source subjected to water flowing in the downward direction in closed channel are conducted. The power increase transient is ensured by step change increase in the heat source power. The theoretical investigation involved a mathematical modeling for axially symmetric, simultaneously developing laminar water flow in a vertical annulus. The mathematical model is based on one dimensional downward flow. The boundary conditions of the studied case are based on adiabatic outer wall, while the inner wall is subjected to a constant heat flux. The heat & mass balance equation derived for specified element of bulk water within the annulu

This paper presents a method to organize memory chips when they are used to build memory systems that have word size wider than 8-bit. Most memory chips have 8-bit word size. When the memory system has to be built from several memory chips of various sizes, this method gives all possible organizations of these chips in the memory system. This paper also suggests a precise definition of the term “memory bank” that is usually used in memory systems. Finally, an illustrative design problem was taken to illustrate the presented method practically

The removal of heavy metal ions from wastewater by sorptive flotation using Amberlite IR120 as a resin, and flotation column, was investigated. A combined two-stage process is proposed as an alternative of the heavy metals removal from aqueous solutions. The first stage is the sorption of heavy metals onto Amberlite IR120 followed by dispersed-air flotation. The sorption of metal ions on the resin, depending on contact time, pH, resin dosage, and initial metal concentration was studied in batch method .Various parameters such as pH, air flow rate, and surfactant concentration were investigated in the flotation stage. Sodium lauryl sulfate (SLS) and Hexadecyltrimethyl ammonium bromide (HTAB) were used as anionic and cationic surfactant re

larization modulation plays an important role in polarization encoding in quantum key distribution. By using polarization modulation, quantum key distribution systems become more compact and more vulnerable as one laser source is used instead of using multiple laser sources that may cause side-channel attacks. Metasurfaces with their exceptional optical properties have led to the development of versatile ultrathin optical devices. They are made up of planar arrays of resonant or nearly resonant subwavelength pieces and provide complete control over reflected and transmitted electromagnetic waves opening several possibilities for the development of innovative optical components. In this work, the Si nanowire metasurface

This paper presents a method to organize memory chips when they are used to build memory systems that have word size wider than 8-bit. Most memory chips have 8-bit word size. When the memory system has to be built from several memory chips of various sizes, this method gives all possible organizations of these chips in the memory system. This paper also suggests a precise definition of the term “memory bank” that is usually used in memory systems. Finally, an illustrative design problem was taken to illustrate the presented method practically.