Current design codes and specifications allow for part of the bonded flexure tension reinforcement to be distributed over an effective flange width when the T-beams' flanges are in tension. This study presents an experimental and numerical investigation on the reinforced concrete flanged section's flexural behavior when reinforcement in the tension flange is laterally distributed. To achieve the goals of the study, numerical analysis using the finite element method was conducted on discretized flanged beam models validated via experimentally tested T-beam specimen. Parametric study was performed to investigate the effect of different parameters on the T-beams flexural behavior. The study revealed that a significant reduction in the beam flexural strength with increasing deflection is encountered as a sizable percentage of reinforcement is distributed over the wider flange width. The study recommended that not more than 33% of the tension reinforcement may be distributed over an effective flange width not wider than ℓn/10. This result confirms and agrees well the ACI 318 limit on the effective width to be less than ℓn/10.
In the geotechnical and terramechanical engineering applications, precise understandings are yet to be established on the off-road structures interacting with complex soil profiles. Several theoretical and experimental approaches have been used to measure the ultimate bearing capacity of the layered soil, but with a significant level of differences depending on the failure mechanisms assumed. Furthermore, local displacement fields in layered soils are not yet studied well. Here, the bearing capacity of a dense sand layer overlying loose sand beneath a rigid beam is studied under the plain-strain condition. The study employs using digital particle image velocimetry (DPIV) and finite element method (FEM) simulations. In the FEM, an experiment
... Show MoreIt is often needed to have circuits that can display the decimal representation of a binary number and specifically in this paper on a 7-segment display. In this paper a circuit that can display the decimal equivalent of an n-bit binary number is designed and it’s behavior is described using Verilog Hardware Descriptive Language (HDL). This HDL program is then used to configure an FPGA to implement the designed circuit.
six specimens of the Hg0.5Pb0.5Ba2Ca2Cu3-y